Quick Overview

This question evaluates understanding of in-memory cache design, including per-entry TTL expiration, LRU eviction, and the data structure and complexity trade-offs required to achieve O(1) average operations.

Implement a TTL LRU Cache

Company: Nimble

Role: Software Engineer

Category: Coding & Algorithms

Difficulty: hard

Interview Round: Technical Screen

Overview: This question evaluates understanding of in-memory cache design, including per-entry TTL expiration, LRU eviction, and the data structure and complexity trade-offs required to achieve O(1) average operations.

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