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Design and benchmark optimized inference pipelines

Last updated: Mar 29, 2026

Quick Overview

This question evaluates knowledge of ML system design and model inference optimization, specifically familiarity with PyTorch's compilation stack (TorchDynamo, TorchInductor and external backends), common acceleration techniques such as quantization, operator fusion, CUDA graphs, batching and parallelism, and the competency to design fair, reproducible performance benchmarks. It is commonly asked to assess reasoning about performance trade-offs, measurement methodology and reproducibility when optimizing latency, throughput, GPU/SM utilization and memory, and it tests both conceptual understanding of compilation and optimization strategies and practical application in benchmark design and reporting.

  • medium
  • NVIDIA
  • ML System Design
  • Software Engineer

Design and benchmark optimized inference pipelines

Company: NVIDIA

Role: Software Engineer

Category: ML System Design

Difficulty: medium

Interview Round: Technical Screen

Describe PyTorch Dynamo (aka TorchDynamo) in the context of accelerating inference: what it does, how it captures/compiles graphs, and how it relates to TorchInductor and backends like TensorRT. List several techniques to speed up inference (briefly): forms of parallelism (data/model/pipeline), effective batching, operator fusion, quantization, kernel autotuning, CUDA Graphs, overlapping compute and data transfer (e.g., pinned memory/streams), sparsity, caching, and graph-level compilers. How would you design a fair inference benchmark? Specify metrics (latency p50/p95/p99, throughput, GPU/SM utilization, memory), test setup (GPU model, precision, batch size and sequence length, warmup and iteration counts, concurrency), baselines (vanilla PyTorch), and how to report absolute and percentage improvements.

Quick Answer: This question evaluates knowledge of ML system design and model inference optimization, specifically familiarity with PyTorch's compilation stack (TorchDynamo, TorchInductor and external backends), common acceleration techniques such as quantization, operator fusion, CUDA graphs, batching and parallelism, and the competency to design fair, reproducible performance benchmarks. It is commonly asked to assess reasoning about performance trade-offs, measurement methodology and reproducibility when optimizing latency, throughput, GPU/SM utilization and memory, and it tests both conceptual understanding of compilation and optimization strategies and practical application in benchmark design and reporting.

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NVIDIA logo
NVIDIA
Jul 15, 2025, 12:00 AM
Software Engineer
Technical Screen
ML System Design
2
0

Accelerating PyTorch Inference: TorchDynamo, Techniques, and Benchmark Design

Context

You are asked to explain how PyTorch's compilation stack accelerates inference and to design a fair, reproducible benchmark for measuring improvements over a vanilla PyTorch baseline.

Tasks

A) TorchDynamo (aka PyTorch Dynamo) for Inference

Describe:

  1. What TorchDynamo does for accelerating inference.
  2. How it captures and compiles graphs (graph breaks, guards, shape specialization).
  3. How it relates to TorchInductor and to external backends (e.g., TensorRT).

B) Techniques to Speed Up Inference (briefly list and define)

Include, at minimum:

  • Data/model/pipeline parallelism
  • Effective batching
  • Operator fusion
  • Quantization
  • Kernel autotuning
  • CUDA Graphs
  • Overlapping compute and data transfer (pinned memory, streams)
  • Sparsity
  • Caching (e.g., KV-cache, allocator)
  • Graph-level compilers

C) Design a Fair Inference Benchmark

Specify:

  • Metrics: latency (p50/p95/p99), throughput, GPU/SM utilization, memory.
  • Test setup: GPU model, software versions, precision, batch size, sequence length, warmup and iteration counts, concurrency.
  • Baselines: vanilla PyTorch eager.
  • Reporting: absolute values and percentage improvements.

Solution

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