Design multithreaded CPU convolution
Company: IBM
Role: Software Engineer
Category: System Design
Difficulty: hard
Interview Round: Take-home Project
Design and implement a multithreaded CPU version of the valid 1‑D convolution from above. For each case, describe work partitioning, scheduling, synchronization, cache locality, false‑sharing avoidance, vectorization (SIMD), and how to combine partial results:
(a) input length = 1,000,000; kernel length = 3.
(b) input length = 1,000,000; kernel length = 1,000,000.
(c) maximum worker threads = 100. Provide pseudocode or an API-level design.
Quick Answer: This question evaluates skills in parallel algorithm design, multithreading and synchronization, CPU microarchitecture awareness (SIMD and cache-line behavior), memory locality and false‑sharing avoidance, and numerical performance engineering for implementing valid 1‑D convolution on multicore CPUs.