Explain RF/analog IC interview fundamentals

You are interviewing for an RF/analog IC design role. Answer the following conceptual questions (no code required). Assume you can introduce any reasonable definitions/assumptions as needed.

RF receiver architecture

1. Explain the difference between homodyne (direct-conversion/zero-IF) and heterodyne (superheterodyne) receivers.
2. Discuss typical pros/cons: LO leakage, DC offsets, 1/f noise, image rejection, filtering requirements, and integration complexity.

Impedance matching & noise

3. What is the goal of impedance matching in RF front-ends? When do you match for maximum power transfer vs minimum noise figure ?
4. Describe how to design an LC matching network (e.g., L/π/T networks) and what constraints set component Q and bandwidth.
5. Explain transmission-line matching (e.g., quarter-wave transformer, stubs) and when distributed matching becomes necessary.

PLL fundamentals

6. Walk through a charge-pump PLL: PFD/CP, loop filter, VCO, divider. What does each block do?
7. How do you reason about PLL stability (loop order, bandwidth, phase margin)? What knobs change stability?
8. Explain PLL noise : which noise sources dominate in-band vs out-of-band, and how loop bandwidth trades off reference noise vs VCO noise.

VCO / oscillator questions

9. Define inductor Q and explain why it matters in VCO design.
10. Compare LC oscillators and ring oscillators in terms of phase noise, tuning range, area, and achievable frequency.
11. For a ring oscillator, what roughly sets oscillation frequency and what design parameters impact jitter/phase noise?

Op-amp fundamentals

12. Derive (at a high level) the main contributors to op-amp input-referred noise (thermal + 1/f) and how device sizing/bias affects it.
13. Discuss op-amp gain and frequency response using a Bode plot: DC gain, dominant pole, unity-gain bandwidth, phase margin.
14. What are key linearity metrics for analog blocks (e.g., THD, IMD, IP3, compression point) and what circuit techniques improve linearity?
15. Explain the principle of noise canceling (noise cancellation) in amplifiers/LNAs and what assumptions it relies on.

Device/current source & coupling

16. What makes a “good” current source in IC design (output resistance, compliance, noise)?
17. Explain inductive coupling : mutual inductance, coupling coefficient k, and practical layout considerations (spacing, orientation, shielding).

Charge pump details

18. In a charge pump PLL, what non-idealities matter (current mismatch, leakage, dead zone, charge sharing), and how do they show up (spurs, steady-state phase error, reference feedthrough)?