My interview focused on digital electronics. We covered Verilog and CMOS fundamentals, then moved to RTL design and questions meant to test how I reasoned through engineering tradeoffs.
The interviewers were professional and mixed conceptual questions with coding and circuit-design problems. They were looking beyond recall: whether I could reason from fundamentals into an implementation and continue when the questions got more detailed. I felt I showed what I knew, but the role did not move forward. It was a useful test of my technical depth even though I left without an offer.
Location: Gurgaon, Haryana. Overall feedback: positive. Offer status: no offer.
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